
108
8161D–AVR–10/09
ATmega48PA/88PA/168PA/328P
Table 14-7 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
rect PWM mode.
Note:
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the ATmega48PA/88PA/168PA/328P and will always read as
zero.
Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
Table 14-8. Modes of operation supported by the Timer/Counter
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Notes:
1. MAX
= 0xFF
2. BOTTOM = 0x00
Table 14-7.
Compare Output Mode, Phase Correct PWM Mode
(1)COM0B1
COM0B0
Description
0
Normal port operation, OC0B disconnected.
01
Reserved
10
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
11
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
Table 14-8.
Waveform Generation Mode Bit Description
Mode
WGM02
WGM01
WGM00
Timer/Counter
Mode of
Operation
TOP
Update of
OCRx at
TOV Flag
0
Normal
0xFF
Immediate
MAX
10
0
1
PWM, Phase
Correct
0xFF
TOP
BOTTOM
2
0
1
0
CTC
OCRA
Immediate
MAX
3
0
1
Fast PWM
0xFF
BOTTOM
MAX
4
1
0
Reserved
–
51
0
1
PWM, Phase
Correct
OCRA
TOP
BOTTOM
6
1
0
Reserved
–
71
1
Fast PWM
OCRA
BOTTOM
TOP